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ATmega128
2. Added the section “Using all Locations of External Memory Smaller than 64 Kbyte”
on page 32 .
3. Added the section “Default Clock Source” on page 37 .
4. Renamed SPMCR to SPMCSR in entire document.
5. When using external clock there are some limitations regards to change of frequency.
This is descried in “External Clock ” on page 42 and Table 131, “External Clock
Drive,” on page 320 .
6. Added a sub section regarding OCD-system and power consumption in the section
“Minimizing Power Consumption” on page 47 .
7. Corrected typo (WGM-bit setting) for:
“Fast P W M Mode” on page 98 (Timer/Counter0).
“Phase Correct P W M Mode” on page 100 (Timer/Counter0).
“Fast P W M Mode” on page 151 (Timer/Counter2).
“Phase Correct PWM Mode” on page 152 (Timer/Counter2).
8. Corrected Table 81 on page 191 (USART).
9. Corrected Table 102 on page 259 (Boundary-Scan)
10. Updated Vil parameter in “DC Characteristics” on page 318 .
Rev. 2467E-04/02
Rev. 2467D-03/02
1. Updated the Characterization Data in Section “Typical Characteristics” on page 333 .
2. Updated the following tables:
Table 19 on page 50 , Table 20 on page 54 , Table 68 on page 157 , Table 102 on page 259 ,
and Table 136 on page 328.
3. Updated Description of OSCCAL Calibration Byte.
In the data sheet, it was not explained how to take advantage of the calibration bytes for
2MHz, 4MHz, and 8MHz Oscillator selections. This is now added in the following sections:
Improved description of “Oscillator Calibration Register – OSCCAL” on page 41 and “Cali-
bration Byte” on page 289 .
1. Added more information about “ATmega103 Compatibility Mode” on page 5 .
2. Updated Table 2, “EEPROM Programming Time,” on page 22 .
3. Updated typical Start-up Time in Table 7 on page 37 , Table 9 and Table 10 on page 39 ,
Table 12 on page 40 , Table 14 on page 41 , and Table 16 on page 42 .
4. Updated Table 22 on page 56 with typical WDT Time-out.
5. Corrected description of ADSC bit in “ADC Control and Status Register A – ADCSRA”
on page 244 .
377
2467X–AVR–06/11
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